VHDL kód pre násobenie dvoch integerov

BEGIN
C#Q :=0 || PC:=n
WHILE(PC>0)
IF A(0) = 1 THEN
C#Q := Q+B
ENDIF
C#Q#A :=0 # SR1(C#Q#A)||
PC := PC - 1
END
END

library IEEE;
use IEEE.Std_logic_1164.all;
use IEEE.Numeric_Std.all;

entity nasobenie_tb is
generic
     (
        DATA_WIDTH : natural := 4
     );
end;

architecture bench of nasobenie_tb is

  component nasobenie
     generic
     (
        DATA_WIDTH : natural := 2
     );
     port
     (
        a      : in signed ((DATA_WIDTH-1) downto 0);
        b      : in signed ((DATA_WIDTH-1) downto 0);
        q  : out signed ((2*DATA_WIDTH-1) downto 0)
     );
  end component;

  signal a: signed ((DATA_WIDTH-1) downto 0);
  signal b: signed ((DATA_WIDTH-1) downto 0);
  signal q: signed ((2*DATA_WIDTH-1) downto 0) ;

begin

  -- Vlozenie hodnot pre parameter generic !!
  uut: nasobenie generic map ( DATA_WIDTH => DATA_WIDTH )
                          port map ( a          => a,
                                     b          => b,
                                     q     => q );

  stimulus: process
  begin
 a <= "00";
   b <= "00";
   wait for 10 ns;
    a <= "00";
   b <= "01";
   wait for 10 ns;
   a <= "00";
   b <= "10";
   wait for 10 ns;
   a <= "00";
   b <= "11";
   wait for 10 ns;
 a <= "01";
   b <= "00";
   wait for 10 ns;
    a <= "01";
   b <= "01";
   wait for 10 ns;
a <= "01";
   b <= "10";
   wait for 10 ns;
   a <= "01";
   b <= "11";
   wait for 10 ns;
 a <= "10";
   b <= "00";
   wait for 10 ns;
   a <= "10";
   b <= "01";
   wait for 10 ns;
   a <= "10";
   b <= "10";
   wait for 10 ns;
   a <= "10";
   b <= "11";
   wait for 10 ns;
 a <= "11";
   b <= "00";
   wait for 10 ns;
   a <= "11";
   b <= "01";
   wait for 10 ns;
   a <= "11";
   b <= "10";
   wait for 10 ns;
   a <= "11";
   b <= "11";
   wait for 10 ns;
   end process; --koniec opisu procesov
 end bench; --koniec opisu architektury tb

# ** Fatal: (vsim-3420) Array lengths do not match. Left is 4 (3 downto 0). Right is 2 (3 downto 2).
#    Time: 0 ps  Iteration: 0  Process: /nasobenie_tb/stimulus File: D:/altera/13.0sp1/nasobenie/nasobenie_tb.vhd
# Fatal error in Process stimulus at D:/altera/13.0sp1/nasobenie/nasobenie_tb.vhd line 41
#